Caple C871i Bedienungsanleitung PDF herunterladen (Seite 335)

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101

Apple II Computer Info

* socket for 2732 EPROM (more on this below)

* 8-bit latched output port

* output strobe (active low)

* 8-bit input port, currently allocated as:

bit 0: printer ACK-

bit 1-3: printer status

bit 4-6: DIP switches

bit 7: interrupt pending

* optional interrupt (IRQ-) generated by printer ACK-

The provision for a 2732 (4k x 8) EPROM is the basis for this scheme

because this chip is replaced by a 2716 (2k x 8) EPROM and a 4116

static RAM of the same size. The high order address line, A11

normally used to select the Grappler's firmware banks becomes the

device select line; low for EPROM and high for RAM.

The physical placement of the two chips is a minor consideration; The

RAM can piggybacked on the ROM, pin for pin except CE- or it can be

fitted somehow onto the solder side of the card. In my computer this

card is in slot 7 so there's no problem with clearance room on the

component side.

A slight modification is needed to make the RAM writable. I tried

this tonight with a 4116 in the firmware socket and it seems to work:

1. Since this is RAM, it needs a WR- signal to accept data. I cut the

trace to U9-21 (was A11 on the 2732 but now the WR- input for a

4116.) and connected a jumper wire from this pin to U3-3, ie. the

RD/WR- line.

2. I cut the short trace from U9 pin 20 (OE-) that connects it to the

line from U6-11 to U9-18. This pin needs to be connected to the

invert of RD/WR-, ie. RD-. For my present purposes I don't need

interrupts from this card, so the resources normally used for

interrupts become available including the latch at U2A, etc.,

and RD- was derived from the NAND gate at U6A.

When I tried this with a card in slot 1 I could write and read

to $C100 - $C1FF with no problem. However, $C800 to $C8FF seems

to be mapped into this same space, so the expansion ROM space

really starts at $C900.

The Grappler+ soft switches are somewhat peculiar. According to the

manual the nominal designations for an i/o write are as follows

$C080,Y output

$C081,Y Select ROM bank 2

$C082,Y reset interrupt Req and IRQ data bit

$C084,Y output/interrupt on ACK

What actually happens is this:

1. If A0 is high then ROM bank 2 is selected. (From IC U1C). Note:

ROM bank 1 is selected on any access to the peripheral firmware

Apple II Computer Technical Information : Apple II Family Hardware Info

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